To help IC design houses to reduce their R&D cost, and make our customers conveniently track the status of the production, we set up MPW program. To ensure the program on-time kick-off. If you want to join our MPW shuttle, please sign the checklist with CE department five days before the gds dead line to make sure the shuttle on time.

6-inch CMOS 0.5µm BCD
Process	Database in
0.5µm 25V BCD	2010-1-20
0.5µm 25V BCD	2010-4-20
0.5µm 25V BCD	2010-7-20
0.5µm 25V BCD	2010-10-20
0.5µm 15V BCD	2010-3-20
0.5µm 15V BCD	2010-5-20
0.5µm 15V BCD	2010-9-20
0.5µm 15V BCD	2010-11-20
0.5µm 40V BCD	2010-3-20
0.5µm 40V BCD	2010-6-20
0.5µm 40V BCD	2010-9-20
0.5µm 40V BCD	2010-12-20
CMOS 0.5µm MIXED
Process	Database in
0.5µm MM(DPTM)	2010-2-10
0.5µm MM(DPTM)	2010-4-10
0.5µm MM(DPTM)	2010-6-10
0.5µm MM(DPTM)	2010-8-10
0.5µm MM(DPTM)	2010-10-10
0.5µm MM(DPTM)	2010-12-10

  8-inch

CMOS 0.18/0.16µm LOGIC Remarks, to take MPW shuttle of 0.18/0.16¦Ìm Logic/MS/RF, pls deliver standard metal layers, 1P6M.  Customer may need to add dummy metal layers if actual database is less than 6 metal layers. For IP merge case, pls submit request and database at least 1 week prior to deadline of MPW tapeout date.
Process	Database in
0.18/0.16µm LOGIC	2010-1-25
0.18/0.16µm LOGIC	2010-3-25
0.18/0.16µm LOGIC	2010-5-25
0.18/0.16µm LOGIC	2010-7-26
0.18/0.16µm LOGIC	2010-9-27
0.18/0.16µm LOGIC	2010-11-22

CMOS 0.13µm LOGIC Remarks, to take MPW shuttle of 0.13¦Ìm Logic/MS/RF, pls deliver standard metal layers, 1P8M.  Customer may need to add dummy metal layers if actual database is less than 8 metal layers. For IP merge case, pls submit request and database at least 1 week prior to deadline of MPW tapeout date.
Process	Database in
0.13µm LOGIC	2010-4-25
0.13µm LOGIC	2010-8-25
0.13µm LOGIC	2010-10-27

CMOS 0.35µm MIXED/LOGIC
Process	Database in
0.35µm MM	2010-3-5
0.35µm MM	2010-5-5
0.35µm MM	2010-8-5
0.35µm MM	2010-11-5